TCL is developing a simulation environment capable of modeling next generation processors, memories and entire HPC systems. Based on the open-source Structural Simulation Toolkit (SST – http://www.sst-simulator.org) TCL is creating advanced models of RISC-V based cores for use in future systems that range from IoT and edge devices to the largest HPC systems. The data generated by these simulations can overwhelm traditional analysis methods and TCL seeks to develop new techniques and interfaces to organize, display and reason about the data produced by SST simulations. Finally, to better interact with complex simulation models TCL seeks to extend the GUI interface to SST allowing developers to quickly assemble and visualize large simulation models.

Duties and Responsibilities:

Essential:

• Continuing development of SST models including the RISC-V model Rev
• Architecting new SST models for emerging advanced HPC Systems
• Development of advanced data analysis and visualization methods
• Continuing development of GUI interface to the SST simulation infrastructure
• Creation of tests for new simulation features

Desired:

• Assist with architecting new hardware modules
• Assist with full system design parameters
• Assist with the creation of SST debugging features

Qualifications:

Essential:

• Masters / PhD (or equivalent experience) in computer science or computer architecture
• Excellent C++ programming skills
• Experience with Python programming
• Experience utilizing Git for software development
• Experience developing in/for Unix/Linux/OSX
• US citizen and subject to background check

Desired:

• Experience with the CMake build infrastructure
• Knowledge of the RISC-V Architecture
• Experience with LaTeX